The invention relates generally to surface mounted connectors on circuit boards, and more specifically to a zero insertion force contact for a grid array connector.
With the ongoing trend toward smaller, faster, and higher performance electrical components such as processors used in computers, it has become increasingly important for other components in the processors' electrical paths to also operate at higher speeds. It is also important that the electrical interfaces connecting the various components to a circuit board become faster. Grid array interfaces, along with surface mount technology, have been developed in response to the need for faster and higher density electrical circuits. As is known in the art, surface mountable packaging allows for the connection of an electronic module, or package, to pads on the surface of the circuit board rather than by contacts or pins soldered in plated holes going through the circuit board.
A Pin Grid Array (PGA) socket has commonly been used for computer processor interfaces. The PGA socket receives pins from the processor and establishes an electrical connection between the processor and a circuit board. The PGA socket may also include a Zero Insertion Force (ZIF) feature that allows the processor pins to be inserted into the socket with little force. Once inserted into the socket, a mechanism on the socket is actuated to move the pins into engagement with the socket contacts to establish an electrical connection.
As computer processors have become more advanced, the pin count of the processors has increased. Current processors have pin arrays with pin counts numbering well into the hundreds. Along with the increased pin count of the processor, the number of socket contacts in the processor socket is also increased. Associated with the increased pin counts, there has been a reduction in pin spacing, and correspondingly, socket contact spacing. Currently, the pin and socket contact spacing on at least some processors has been reduced to a centerline grid having, for example, 0.050 inches between pin and contact ceterlines.
As the number of contact pins increases, the insertion force required to insert the processor into the connector socket also tends to increase. It would therefore be desirable to provide PGA sockets that can accommodate the higher contact densities and continue to provide the ZIF features.
In at least some grid array connectors, single or dual beam contact designs are used wherein the contact beams are formed in a curved geometry over the body of the contact. One drawback in this configuration is that the contact beams, due to their orientation with respect to the contact body, cannot be formed by stamping in a two-piece die. Rather, the beams are shaped in free space which makes dimensions and tolerances difficult to control.
The aforementioned developments and advances present ongoing challenges for both simplified connector designs as well as manufacturing methods that reduce product cost while overcoming the drawbacks with current manufacturing processes.